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| BUK9Y19-55B N-channel TrenchMOSTM logic level FET M3D748 Rev. 01 -- 28 May 2004 Product data 1. Product profile 1.1 Description N-channel enhancement mode field-effect power transistor in a plastic package using Philips High-Performance Automotive (HPA) TrenchMOSTM technology. 1.2 Features s Very low on-state resistance s 175 C rated s Q101 compliant s Logic level compatible. 1.3 Applications s Automotive systems s Motors, lamps and solenoids s 12 V and 24 V loads s General purpose power switching. 1.4 Quick reference data s EDS(AL)S 91 mJ s ID 40 A s RDSon = 16.3 m (typ) s Ptot 75 W. 2. Pinning information Table 1: Pin 1,2,3 4 mb Pinning - SOT669 (LFPAK) simplified outline and symbol Description source (s) gate (g) mounting base, connected to drain (d) mb d Simplified outline Symbol g 1 2 3 4 MBL286 MBL798 s1 s2 s3 Top view SOT669 (LFPAK) Philips Semiconductors BUK9Y19-55B N-channel TrenchMOSTM logic level FET 3. Ordering information Table 2: Ordering information Package Name BUK9Y19-55B LFPAK Description Plastic single-ended surface mounted package (Philips version LFPAK); 4 leads Version SOT669 Type number 4. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS ID drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) drain current (DC) Tmb = 25 C; VGS = 5 V; Figure 2 and 3 Tmb = 100 C; VGS = 5 V; Figure 2 IDM Ptot Tstg Tj IDR IDRM peak drain current total power dissipation storage temperature junction temperature reverse drain current (DC) peak reverse drain current Tmb = 25 C Tmb = 25 C; pulsed; tp 10 s unclamped inductive load; ID = 40 A; VDS 55 V; VGS = 5 V; RGS = 50 ; starting Tmb = 25 C Tmb = 25 C; pulsed; tp 10 s; Figure 3 Tmb = 25 C; Figure 1 RGS = 20 k Conditions Min -55 -55 Max 55 55 15 40 28 160 75 +175 +175 40 160 91 Unit V V V A A A W C C A A mJ Source-drain diode Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy EDS(AL)R repetitive drain-source avalanche energy [1] - [1] - Maximum value not quoted. Repetitive rating defined in Figure 16. Single-shot avalanche rating limited by Tj(max) of 175 C. Repetitive avalanche rating limited by Tj(avg) of 170 C. Refer to http://www.semiconductors.philips.com/acrobat/applicationnotes/AN10273_1.pdf for further information. 9397 750 13188 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data Rev. 01 -- 28 May 2004 2 of 12 Philips Semiconductors BUK9Y19-55B N-channel TrenchMOSTM logic level FET 120 Pder (%) 80 03na19 50 ID (A) 40 03nl99 30 20 40 10 0 0 50 100 150 200 Tmb (C) 0 0 50 100 150 Tmb (C) 200 P tot P der = ---------------------- x 100% P tot ( 25 C ) VGS 5 V Fig 1. Normalized total power dissipation as a function of mounting base temperature. Fig 2. Continuous drain current as a function of mounting base temperature. 103 03nm00 ID (A) Limit RDSon = VDS / ID 102 tp = 10 s 100 s 10 1 ms DC 10 ms 100 ms 1 1 10 VDS (V) 102 Tmb = 25 C; IDM single pulse. Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage. 9397 750 13188 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data Rev. 01 -- 28 May 2004 3 of 12 Philips Semiconductors BUK9Y19-55B N-channel TrenchMOSTM logic level FET 5. Thermal characteristics Table 4: Rth(j-mb) Thermal characteristics Conditions Figure 4 Min Typ Max 2 Unit K/W thermal resistance from junction to mounting base Symbol Parameter 5.1 Transient thermal impedance 10 Zth(j-mb) (K/W) = 0.5 1 0.2 0.1 0.05 10-1 0.02 P 03nm01 = tp T tp single shot 10-2 10-6 10-5 10-4 10-3 10-2 10-1 T tp (s) t 1 Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration. 9397 750 13188 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data Rev. 01 -- 28 May 2004 4 of 12 Philips Semiconductors BUK9Y19-55B N-channel TrenchMOSTM logic level FET 6. Characteristics Table 5: Characteristics Tj = 25 C unless otherwise specified Symbol V(BR)DSS Parameter drain-source breakdown voltage Conditions ID = 0.25 mA; VGS = 0 V Tj = 25 C Tj = -55 C VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Figure 9 Tj = 25 C Tj = 175 C Tj = -55 C IDSS drain-source leakage current VDS = 55 V; VGS = 0 V Tj = 25 C Tj = 175 C IGSS RDSon gate-source leakage current drain-source on-state resistance VGS = 15 V; VDS = 0 V VGS = 5 V; ID = 20 A; Figure 7 and 8 Tj = 25 C Tj = 175 C VGS = 4.5 V; ID = 20 A VGS = 10 V; ID = 20 A Dynamic characteristics Qg(tot) Qgs Qgd Ciss Coss Crss td(on) tr td(off) tf VSD trr Qr total gate charge gate-to-source charge gate-to-drain (Miller) charge input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time source-drain (diode forward) voltage reverse recovery time recovered charge IS = 25 A; VGS = 0 V; Figure 15 IS = 20 A; dIS/dt = -100 A/s VGS = -10 V; VDS = 30 V VDD = 30 V; RL = 1.2 ; VGS = 5 V; RG = 10 VGS = 0 V; VDS = 25 V; f = 1 MHz; Figure 12 VGS = 5 V; VDD = 44 V; ID = 25 A; Figure 14 18 5 8 1494 217 86 18 180 44 134 0.85 52 38 1992 260 118 1.2 nC nC nC pF pF pF ns ns ns ns V ns nC 16.3 14.3 19 40 21 17.3 m m m m 0.02 2 1 500 100 A A nA 1.1 0.5 1.5 2 2.3 V V V 55 50 V V Min Typ Max Unit Static characteristics Source-drain diode 9397 750 13188 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data Rev. 01 -- 28 May 2004 5 of 12 Philips Semiconductors BUK9Y19-55B N-channel TrenchMOSTM logic level FET 120 Label is VGS (V) ID (A) 80 10 6 5 4.6 4.4 4.2 4 3.8 40 3.6 3.4 3.2 3 2.8 2.6 0 2 4 6 8 03np29 30 RDSon (m) 25 03np28 20 15 0 10 10 VDS (V) 3 7 11 VGS (V) 15 Tj = 25 C; tp = 300 s Tj = 25 C; ID = 20 A Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values. Fig 6. Drain-source on-state resistance as a function of gate-source voltage; typical values. 50 RDSon (m) 40 03np30 2.4 a 03nb25 3.2 3.4 3.6 3.8 4 5 10 1.6 30 20 Label is VGS (V) 10 0.8 0 0 40 80 ID (A) 120 0 -60 0 60 120 T (C) 180 j Tj = 25 C R DSon a = ---------------------------R DSon ( 25 C ) Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature. Fig 7. Drain-source on-state resistance as a function of drain current; typical values. 9397 750 13188 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data Rev. 01 -- 28 May 2004 6 of 12 Philips Semiconductors BUK9Y19-55B N-channel TrenchMOSTM logic level FET 2.5 VGS(th) (V) 2.0 max 03ng52 10-1 ID (A) 10-2 03ng53 1.5 typ -3 10 min typ max 1.0 min 10-4 0.5 10-5 0.0 -60 0 60 120 Tj (C) 180 10-6 0 0.5 1 1.5 2 2.5 3 VGS (V) ID = 1 mA; VDS = VGS Tj = 25 C; VDS = VGS Fig 9. Gate-source threshold voltage as a function of junction temperature. Fig 10. Sub-threshold drain current as a function of gate-source voltage. 40 gfs (S) 30 03np15 2500 C (pF) 1875 03np31 Ciss 1250 Coss 20 625 Crss 10 0 10 20 ID (A) 30 0 10-1 1 10 VDS (V) 102 Tj = 25 C; VDS = 25 V VGS = 0 V; f = 1 MHz Fig 11. Forward transconductance as a function of drain current; typical values. Fig 12. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values. 9397 750 13188 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data Rev. 01 -- 28 May 2004 7 of 12 Philips Semiconductors BUK9Y19-55B N-channel TrenchMOSTM logic level FET 60 ID (A) 40 03np27 5 VGS (V) 4 03np14 VDD = 14 V VDD = 44 V 3 Tj = 175 C 20 Tj = 25 C 2 1 0 0 1 2 3 VGS (V) 4 0 0 5 10 15 QG (nC) 20 VDS = 25 V Tj = 25 C; ID = 25 A Fig 13. Transfer characteristics: drain current as a function of gate-source voltage; typical values. Fig 14. Gate-source voltage as a function of gate charge; typical values. 100 IS (A) 75 03np13 102 IAV (A) 03np79 Single-shot Tj = 25 C Tj = 175 C 50 Tj = 25 C 10 Single-shot Tj = 150 C 25 Repetitive 0 0.0 0.3 0.6 0.9 VSD (V) 1.2 1 10-3 10-2 10-1 1 tAV (ms) 10 VGS = 0 V See Table note [1] to Table 3 "Limiting values" Fig 15. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values. Fig 16. Single-shot and repetitive avalanche rating; avalanche current as a function of avalanche period. 9397 750 13188 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data Rev. 01 -- 28 May 2004 8 of 12 Philips Semiconductors BUK9Y19-55B N-channel TrenchMOSTM logic level FET 7. Package outline Plastic single-ended surface mounted package (Philips version LFPAK); 4 leads SOT669 E b2 L1 A c2 A2 C E1 b3 mounting base D1 H D b4 L2 1 e 2 3 b 1/2 4 X wM A c e A A1 C (A 3) detail X L yC 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A A1 A2 A3 b b2 b3 2.2 2.0 b4 0.9 0.7 c c2 D (1) D1(1) E(1) E1(1) max 5.0 4.8 3.3 3.1 e 1.27 H 6.2 5.8 L 0.85 0.40 L1 1.3 0.8 L2 1.3 0.8 w 0.25 y 0.1 8 0 1.20 0.15 1.10 0.50 4.41 0.25 1.01 0.00 0.95 0.35 3.62 0.25 0.30 4.10 4.20 0.19 0.24 3.80 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT669 REFERENCES IEC JEDEC MO-235 JEITA EUROPEAN PROJECTION ISSUE DATE 03-02-05 03-09-15 Fig 17. SOT669 (LFPAK). 9397 750 13188 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data Rev. 01 -- 28 May 2004 9 of 12 Philips Semiconductors BUK9Y19-55B N-channel TrenchMOSTM logic level FET 8. Revision history Table 6: Rev Date 01 20040528 Revision history CPCN Description Product data (9397 750 13188) 9397 750 13188 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data Rev. 01 -- 28 May 2004 10 of 12 Philips Semiconductors BUK9Y19-55B N-channel TrenchMOSTM logic level FET 9. Data sheet status Level I II Data sheet status[1] Objective data Preliminary data Product status[2][3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). III Product data Production [1] [2] [3] Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 10. Definitions Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 12. Trademarks TrenchMOS -- is a trademark of Koninklijke Philips Electronics N.V. 11. Disclaimers Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors Contact information For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com. 9397 750 13188 Fax: +31 40 27 24825 (c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data Rev. 01 -- 28 May 2004 11 of 12 Philips Semiconductors BUK9Y19-55B N-channel TrenchMOSTM logic level FET Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 5.1 6 7 8 9 10 11 12 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Transient thermal impedance . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 (c) Koninklijke Philips Electronics N.V. 2004. Printed in The Netherlands All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 28 May 2004 Document order number: 9397 750 13188 |
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